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Description

It's easy to verify constraints for clearance, high-speed, fabrication, maximum via count, and testability constraints in PADS. Set up, save, and use verification schemes as you see fit. Violations can be viewed in an intuitive spreadsheet with just two mouse clicks. Select a rule violation from the spreadsheet to automatically zoom in and correct the violation and quickly re-verify that the violation has been corrected.

Design Areas: PADS Home Page | Products: Constraint management, PCB Layout